/*
 * File      : board.c
 * This file is part of RT-Thread RTOS
 * COPYRIGHT (C) 2006 - 2009 RT-Thread Develop Team
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
 *  the Free Software Foundation; either version 2 of the License, or
 *  (at your option) any later version.
 *
 *  This program is distributed in the hope that it will be useful,
 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *  GNU General Public License for more details.
 *
 *  You should have received a copy of the GNU General Public License along
 *  with this program; if not, write to the Free Software Foundation, Inc.,
 *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
 *
 * Change Logs:
 * Date           Author       Notes
 * 2011-01-13     weety      first version
 * 2015-05-02     ArdaFu     Port from AT91SAM9260 BSP
 */

#include <rtthread.h>
#include <rthw.h>
#include <common.h>
#include <etimer.h>
#include "board.h"
#include <mmu.h>
#include "interrupt.h"
#include "hal_init.h"
#include "com_obj.h"
#include "mbapp.h"

//#define RT_SYS_HEAP_SIZE         (48*1024UL)
#define RT_SYS_HEAP_SIZE         (256*1024UL)

extern void rt_hw_interrupt_init(void);
extern void rt_hw_clock_init(void);
extern void rt_hw_uart_init(void);

static struct mem_desc hw_mem_desc[] =
{
    { 0x00000000, 0xFFFFFFFF, 0x00000000, RW_NCNB },/* None cached for 4G memory */
//  visual start, visual end, phy start , props
    { 0x00000000, 0x000FFFFF, 0x00000000, RW_CB },    /* 1M-ISR Vector table */
    { 0x00100000, 0x03FFFFFF, 0x00100000, RW_CB },    /* 63M cached SDRAM */
    { 0x80000000, 0x83FFFFFF, 0x80000000, RW_NCNB },  /* 64M none-cached SDRAM */
    { 0x3C000000, 0x3C00DFFF, 0x3C000000, RW_CB },    /* 56K cached SRAM 0/1 */
    { 0xBC000000, 0xBC00DFFF, 0xBC000000, RW_NCNB },  /* 56K none-cached SRAM 0/1 */
};

/*OBJ_SRAM*/ static uint8_t rt_system_heap[RT_SYS_HEAP_SIZE];
void os_tick_hook(void);
/**
 * This function will handle rtos timer
 */
static void rt_systick_handler( void *param)
{
    rt_tick_increase();
    os_tick_hook();
    outpw(REG_ETMR0_ISR, 1);
}

/**
 * This function will init pit for system ticks
 */
static void rt_hw_timer_init()
{
    ph_reset_en(RST_APB0_ETIMER0);
    CLK_ETIMER0_S_XIN();
    ph_reset_dis(RST_APB0_ETIMER0);
    ETIMER_Open(0, ETIMER_PERIODIC_MODE, RT_TICK_PER_SECOND);
    ETIMER_EnableInt(0);
    ETIMER_Start(0);
    /* install interrupt handler */
    rt_hw_interrupt_install(ETMR0_IRQn, rt_systick_handler, RT_NULL, "SysTick");
    sysSetInterruptPriorityLevel(ETMR0_IRQn, IRQ_LEVEL_3);
    sysSetInterruptType(ETMR0_IRQn, HIGH_LEVEL_SENSITIVE);
    rt_hw_interrupt_umask(ETMR0_IRQn);

}

/**
 * This function will init at91sam9260 board
 */
void rt_hw_board_init(void)
{
    /* initialize mmu */
    rt_hw_mmu_init(hw_mem_desc, sizeof(hw_mem_desc)/sizeof(hw_mem_desc[0]));
    /* initialize hardware interrupt */
    rt_hw_interrupt_init();
    
    hal_init();
    
    /* initialize uart */
    memset(&com, 0, sizeof(com));
    memset(&mb, 0, sizeof(mb));
    com00_Init(0, 115200, COM_PAR_NONE_1S);
    com01_Init(0, 115200, COM_PAR_NONE_1S);
    
    /* initialize timer0 */
    rt_hw_timer_init();
    
    rt_system_heap_init(rt_system_heap,&rt_system_heap[RT_SYS_HEAP_SIZE-1]);
}
